HW/SW Engineer - Static Timing Analysis

Job Description

Company: Siemens EDA

Job Title: HW/SW Engineer - Static Timing Analysis 

Job Reference #:  201151

Job Location: Wilsonville, OR, Remote, US

Siemens EDA  (Formerly Mentor Graphics) has an opportunity for an experienced software/hardware engineer responsible for designing and implementing products/features including writing specifications, planning, schedule estimation, and implementation keeping in mind the project timelines, objectives, and goals.

The Tessent team is responsible for developing and providing DFT solutions involving test IPs that improve the overall testability of a design. These test IPs are delivered and treated as any regular IP that have to be integrated into customer designs. As the complexity of designs grow along with shrinking design cycles, there is a trend across the industry to push much of the DFT analysis, insertion, and integration of the DFT IPs in RTL. The successful candidate should have very good knowledge of Tcl/Python programming, digital circuit design, and design implementation flows with particular emphasis on delay constraints, static timing analysis, and timing optimization techniques. The candidate must also be conversant with hardware-description languages such as System Verilog and VHDL. The candidate is expected to become an expert on Tessent IPs and will be actively guiding our customers integrate them into their designs.

The candidate will be responsible for collaborating with other engineers that are part of software and hardware development teams, quality assurance, technical marketing, technical publications, and customer support teams to enable timely delivery of high quality products. Self-motivation, ownership of technical problems, results driven positive attitude, solid teamwork, and good communication skills are essential for success within the business unit.


  • BS/MS/Ph.D. in Electrical or Computer Engineering, or other related field. 
  • Software Engineering skills, especially in scripting languages such as Tcl and Python.  
  • Very good knowledge of digital logic design along with hardware description languages, such as Verilog, System Verilog, and VHDL. 
  • Knowledge of DFT and best known industry practices are desirable.
  • Knowledge and understanding of all aspects of a design flow – in particular SDC, static timing analysis, and timing optimization. 
  • Strong analysis, design, and problem solving skills. 
  • Attention to details and the ability to accurately estimate tasks and deliver on schedule. 
  • Good verbal, written, and interpersonal communication skill

Where permitted by applicable law, Siemens may require employees to be fully vaccinated against COVID-19 based on job requirements, and in accordance with an accommodation based on legally protected reasons.



At Siemens we are always challenging ourselves to build a better future.  We need the most innovative and diverse Digital Minds to develop tomorrow’s reality.  Find out more about the Digital world of Siemens here:

Organization: Digital Industries

Company: Siemens Industry Software Inc.

Experience Level: Experienced Professional

Job Type: Full-time

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