- Understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesizable design using Verilog/System Verilog, verification.
- Individual must be able to guide the verification team to create verification test plans and environments, testcase development, VIP usage, and the ability to debug of defects found through verification processes.
- Individual would need to engage with customers for Deployment and R&D assistance.
- Exposure of object oriented programming using languages such as C++ is advantage Experience in scripting languages such as Perl,
- Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc.
- Understanding of verification tools like Simulator, Synthesis etc.
- Hands on experience on System Verilog, UVM, SystemC, RTL development.
- Understanding of some of the standard protocol interfaces like AMBA, PCIe, USB etc.
- Excellent written and verbal interpersonal skills
- Self-motivated and great teammate
- Knowledge of C/C++/Python programming languages
- Understanding of verification solutions beyond simulation like Emulation, Formal etc.
Organization: Digital Industries
Company: Mentor Graphics (India) Private Limited
Experience Level: Experienced Professional
Job Type: Full-time