VIP Verification Engineer

Job Description

Verification IP Engineer

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen4/Gen5, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CCIX for use with Questa RTL simulation.    

  1. Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques.     
  2. You will specify, implement, test and enhance these verification components for a wide range of end user applications.
  3. You will interact with TMEs and Field AEs or directly with customers to deploy or resolve customer issues  


Job Qualifications: 

B.Tech/ M.Tech in electrical engineering or related field from reputed institute

Sound knowhow of System Verilog for testbench with exposure to verification methodologies like UVM, VMM etc.

Intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc.

2-8 years of experience in verification engineering   

Organization: Digital Industries

Company: Mentor Graphics (India) Private Limited

Experience Level: Mid-level Professional

Job Type: Full-time

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