Job Title: Applications Engineer Consultant - 249077
Job Location: USA - CA - Fremont
- Provide technical leadership in the sales and support of a wide range to Formal Verification technologies for our leading edge customers
- Integrates Design Constraint Solutions, Formal Property Checking, and other Formal based Applications products (at the block/chip/system level) and ensures expected behavior in customer's environments
- Perform assessments of customer environments and requirements, providing expertise on topics such as: Static & Formal Verification planning, RTL development using Assertion methodologies, Functional verification and modeling of digital/mixed-signal ASICs and SoCs, Failure analysis and resolution, Coverage analysis, RTL/Gate-simulations, Regression debug and other flow/infrastructure development and testing
- Accountable for the uncovering, scoping, and technical validity of the solutions to achieve the customer's design and verification objectives
- Keeps other technical peers informed of new and emerging technologies, share best practices and information in the Static & Formal Verification trends
- Become a trusted advisor to customer's business & technical pain point and eventually earns the trust to influence customer's decision process and business objectives
- Articulate customer’s technical needs and requirements to product engineering, influence and shape product direction
- Deliver ongoing customer training classes and consulting related to advance Static & Formal verification topics, as well as assist in driving the adoption of these into customer design and verification process, participate in developing technical white papers, attend local and regional technical seminars and technology conferences to educate and promote DVT solutions and network with attendees
- Mentor and/or coach junior AEs on the team, participate in lead roles solicited by management
Approximately 25% travel to various local customer sites.
Skills & Requirements:
- BS in electrical, computer or electronics engineering, computer science, or equivalent discipline with 7+ years of verification or related experience
- MS in electrical or computer engineering, computer science, or equivalent discipline with 5+ years of verification or related experience
- Strong background with HDLs (e.g. Verilog, VHDL), Assertion Based Verification (e.g. OVL, SVA), Formal methodologies (e.g. Property creation & checking, Bounded proofs, Bug hunting, Debugging)
- Strong knowledge and skill with design of complex logic, clocking circuits and methods, multiple clock domains, crossing, jitter, issues related with domain crossing, past experience with using CDC tools (Questa/0in CDC, Spyglass) and timing closure tools (PrimeTime), SDC (Synthesis Design Constraints)
- Demonstrated experience with coding and application of SVA Properties and Simulation of complex SoC environments, makefile creation, use of Python, Perl, C/C++ scripts
- Strong trouble shooting, triage and debugging skills
- Deep knowledge of semiconductor IC industry – ASIC, SoC, Memory, Interconnect, CPU architectures, embedded systems
- Ability to work in a fast paced, results oriented, team environment
- Positive attitude and good communication skills
- Energetic and self-motivated
· Prior leadership roles or experiences
Additional Skills Preferred (but not required):
- Prior 5+ years Applications Engineering experience is a plus
- Knowledgeable in the areas of Verification IP protocols e.g. AMBA, USB, ETHERNET, PCIE, DDR, HBM, other
- Knowledge and experience in emerging technologies – AI, ML, 5G, Automotive, IoT, Networking and Functional Safety (FuSa)
- Real Number Modelling (RNM) design, simulation and measurement experience
- Hardware Emulation and FPGA prototyping methodology
- Prior leadership roles or experiences
Organization: Digital Industries
Company: Siemens Industry Software Inc.
Experience Level: Experienced Professional
Job Type: Full-time
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