We are seeking a Corporate Application Engineer to provide technical support to our customers using our Tessent Design-For-Test products , and to provide product instruction to our customers and field personnel.
This role will allow you to better understand DFT techniques and usage on design in many IC’s used in industries like AI, Automotive, Cellular Phone and many more.
Related responsibilities include: Some travel (less than 10%). : Keeping current on Scan Insertion, ATPG, BIST and Diagnosis tools; working with our Applications Engineers and Customers worldwide to solve technical DFT issues; developing and delivering best in class DFT product and flow support.
The successful candidate will possess the following combination of education and experience:
MSEE + 2 years or BSEE + 3 years’ experience implementing design-for-test methodologies on current IC technologies
Experience with design, simulation, and verification of ASIC/VLSI circuits and systems, design verification and product test generation preferred
Strong understating of scan insertion, BoundaryScan (1149.1), ATPG and Compression Methodologies Required
Expertise using relevant tools: Tessent TestKompress, Tessent Scan, Tessent FastScan, Tessent MemoryBIST, Tessent BoundaryScan, Tessent Diagnosis
Good understanding of RTL, Gate Level, and System Verilog
Ability to develop TCL scripts
Strong verbal / written communication skills; excellent active listening skills
Some travel is required (10%)
English and Mandarin written and communication skills a must
Organization: Digital Industries
Company: Mentor Graphics (Shanghai) Electronic Technology Co., Ltd.
Experience Level: Experienced Professional
Job Type: Full-time