- Working on 7nm, 5nm and 4nm designs with various customers for deployment of Aprisa place and route tools.
- Responsible for defining and working on full P&R flow with Aprisa tools with special focus on scan methodology using Tessent.
- Closely working with various R&D teams to develop scan aware P&R solution.
- Typically requires minimum of 5-15 years of experience in Physical Design with mainstream P&R tools
- Should have worked on flow/methodology development with good expertise on DFT tools like Tessent
- Hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs.
- Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-lnnovus or Aprisa is a must.
- Tapeout experience of 2 or more projects is a must.
- Good understanding of timing, power and area trade-offs.
- Ability to pickup new flows, learn on the job and influence QOR is a must.
- TCL, Perl or Python scripting is a plus.
- Strong verbal and written communication skills; good presentation skills
- Good problem solving and debugging skills
Organization: Digital Industries
Company: Mentor Graphics (India) Private Limited
Experience Level: Experienced Professional
Job Type: Full-time