Job Title: R&D Software Engineer
Job Location: India – Noida Job
Experience: 2 to 4 years
About the group: Calypto System Design R&D group.
CSD works on cutting edge tools like Captapult, SLEC & Powerpro. Charter of the team is to bring out state of the art High Level Synthesis solution and reduction of power across
SOC world. We are team with lots of energy, synergy and passion.
Manage, understand, and satisfy customer requirements and expectations, including changes, to deliver quality systems and maximize productivity. Responsible for tests, methods, and procedures to ensure continuous improvement to software quality assurance standards. Implements and defines testing methodology and standards to improve results. Defines and implements design rules, techniques, and methods to set reliability and quality goals.
Job-Duties: We are looking for a highly motivated product verification engineer to work in the Catapult engineering team of the CSD Division.
· Sponsors quality process and procedures throughout the entire product lifecycle including inspections, code reviews, requirements, code coverage and quality improvement.
· Set expectations for product quality, create a plan to measure the expectations, and ensure execution of the plan.
· Testing product for defects and limitations, and boundaries (think of all the ways that a product might not work).
· Collaborates and coordinates as needed with global engineering and QA teams.
· Review functional and design specifications and other project documentation. Review internal and external product and release documentation and provide appropriate input to others, e.g. KPD, third party providers, etc.
· Coordinate efforts with SW Development and Release Team members to ensure quality software releases.
· Looking forward to creating solutions which help everyone from development team to QA teams in increasing efficiency.
· Knowledge of C++/SystemC .
· Proficient in one of the scripting languages like perl, python, tcl.
· Experience with UNIX and / or LINUX platforms.
· Good problem solving and analytical skills.
· The person should be self-motivated and can work independently.
Good to have
· Knowledge of Verilog, System Verilog, VHDL.
· Exposure to Simulation or Formal based verification methodologies.
· Experienced in Code Coverage metrics.
Education: B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college.
Organization: Digital Industries
Company: Mentor Graphics (India) Private Limited
Experience Level: Mid-level Professional
Job Type: Full-time