Would you love to be a part of one of the world's leading software companies?
IC Verification Solutions (ICVS) Division, is seeking highly qualified QA Test Engineer within Questa Static & Formal Quality Assurance Team.
Questa Static & Formal Apps including Questa CDC/RDC, Questa Propcheck/Autocheck/Covercheck and Questa Lint are one of the leading tools in Static verification all sharing a unified, advanced debugging environment for HW designs. Our accepted candidates will explore a lot about the advanced functional verification solutions of today’s complex HW designs. Additionally, they will gain a solid base about describing the HW design and verification environment using a large spectrum of HDLs and Testbench Specification Languages such as (Verilog, System Verilog, VHDL, SVA, PSL and UPF).
Questa Static & Formal is a complete functional verification solution that incorporates a superior support of multiple verification methodologies such as clock and reset domain crossing verifications, assertion based verification, formal verification. So if you would like to be tomorrow expert in the field of advanced functional verification methodologies, our team is the team to apply in.Main Responsibilities
- Mastering different Questa Static & Formal Apps with a good understanding about the underlying technology.
- Write, maintain and execute product test/quality plans.
- Test cases Design, Execution and Status Summarization.
- Participate in Various Product Testing Types (Integration Testing, Regression Testing, License testing, Installation testing and GUI Testing) throughout the release life cycle.
- Build Test Automation framework to eliminate manual testing rework and reduce testing turnaround time.
- Understand customer field of use and help with the integration of customer designs in our test environments.
- Product benchmarking and performance measurements iterations to capture tool performance data between releases.
- Defects reporting, validation and defect triaging to understand the root cause of the problem and define their criticality to RD groups.
- Utilize code coverage techniques/tools to quantitatively judge product test coverage.
- Help in the deployment and monitoring of other qualification techniques like static code analysis (Lint), dynamic code analysis and memory leakage checks.
- BS/MS. in Electrical Engineering or Computer Engineering or any related field.
- Excellent knowledge about digital/RTL design basics.
- Strong knowledge about Hardware Description Languages (Verilog, VHDL or System Verilog) is Required.
- Knowledge in Clock/Reset Domain Crossing is a plus.
- Knowledge in Formal Verification and modeling is a plus.
- Solid Knowledge about assertion specification languages such as (PSL, SVA or OVL) is a plus.
- Experience in scripting languages such as Shell/Perl/Python and QT is required.
- Knowledge about Quality Assurance Concepts, SW Testing, Testing Strategies, Test Planning and Testing Automation Tools.
- Knowledge about Defect Tracking Systems, Configuration Management and Code Profiling Tools.
- Highly developed communication skills, including the ability to present ideas and share your knowledge with others.
We’re Siemens. A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow!
We offer a comprehensive reward package which includes a competitive basic salary and generous holiday allowance.
Siemens is an equal opportunities employer and do not discriminate unlawfully on any grounds. We are committed to providing access and equal opportunity.
Siemens Software. Where today meets tomorrow.
Organization: Digital Industries
Company: Mentor Graphics Egypt Company (A Limited Liability Company - Private Free Zone)
Experience Level: Mid-level Professional
Job Type: Full-time