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Senior Verification Engineer

Job Description

We are Siemens

Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics in order to deliver better products in the increasingly complex world of chip, board and system design.

Tessent Embedded Analytics, part of Siemens EDA, is a pioneering developer of analytics and monitoring technology at the heart of the systems-on-chip (SoCs) that power today’s electronic products. Our embedded analytics technology allows product designers to add sophisticated cybersecurity, functional safety and performance tuning features; and it helps resolve critical issues such as increasing system complexity and ever- decreasing time-to-market. We are proud of our technology and selling globally to many of the most respected and most exciting technology companies in the world.

What we’re looking For

Are you a Verification Engineer with experience of verifying silicon IP? Then come and join our growing team here at Tessent Embedded Analytics (part of Siemens EDA). If you can you see yourself learning, growing, and succeeding in this exciting position and would relish the opportunity help shape the development of Tessent EA’s ground-breaking silicon IP then we would love to meet you!

What you’ll be doing

  • Developing, improving and maintaining leading edge UVM verification environments for silicon IP blocks with a focus on surpassing customer expectations
  • Contributing to the evolution and continuous improvement of our development processes
  • Ensuring the overall quality of the released product
  • Accessing advanced tools and opportunities to influence the features of Mentor verification tools

What you’ll bring

  • Solid understanding of UVM or OVM
  • Verification Planning and Management methods skills
  • Excellent System Verilog and Verilog experience including experience of formulating and writing System Verilog coverage statements
  • Experience of creating testbenches for and testing of silicon IP

Nice if you have

  • Familiarity with SVA assertions or similar
  • Familiarity with IC design and implementation
  • Experience in Formal Verification

Join our Digital World

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.

We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, private healthcare and actively support working from home.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

At Siemens, we are always challenging ourselves to build a better future. We have some of the smartest minds working across the world, re-imagining the future and doing extraordinary things. Join our Talent Community today and let's stay connected in areas that interest you: https://new.siemens.com/global/en/company/jobs/digital-minds.html

Siemens Software. Where today meets tomorrow!

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Organization: Digital Industries

Company: Siemens Electronic Design Automation Ltd

Experience Level: Experienced Professional

Full / Part time: Full-time

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