Lead Product Engineer (Physical Design)

Job Role:

• Working on 7nm, 5nm and 4nm designs with various customers for deployment of Aprisa place and route tools.
• Responsible for defining and working on 3DIC flow with Aprisa tools
• Closely working with Foundry and early customers on adoption of the 3DIC flow.

Job Requirement:

• Typically requires minimum of 5-15 years of experience in Physical Design with mainstream P&R tools
• Should have worked on 3DIC designs or flow/methodology development
• Hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs.
• Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-lnnovus or Aprisa is a must.
• Tapeout experience of 2 or more projects is a must.
• Good understanding of timing, power and area trade-offs.
• Ability to pickup new flows, learn on the job and influence QOR is a must.
• Experience delivering designs with multiple voltage islands and top-level floorplanning & chip-assembly is a plus.
• TCL, Perl or Python scripting is a plus.
• Strong verbal and written communication skills; good presentation skills
• Good problem solving and debugging skills