Interfaces with top-level customer engineers and managers to develop or enhance complex computer-aided engineering design or manufacturing processes for a customer. Uses computer-aided systems to assist and instruct lead customer engineers on large-scale, complex design and tooling tasks involving multiple design environments. Cogently communicates software problems to product development. Assists other engineers in the design, development, and implementation of large-scale, complex graphical application programs on multiple software products and hardware platforms. Provides business and technical feedback to software and hardware vendors. Uses advanced data exchange methodologies to facilitate effective data sharing between dissimilar systems or applications that span across engineering disciplines. Provides technical guidance to lead customer engineers in the application of complex design techniques and system procedures related to computer-aided engineering software. Responsible for in-depth technical papers and presentations to customer management. Technical Lead in guiding junior engineers. Works without supervision on highly complex projects with complete latitude for independent judgment. Extensive knowledge of the field.

Minimum Qualifications:

BS Electronic/Computer Engineering from an accredited institution
Minimum of 2+ years of Digital Design/Verification experience
Knowledge of VHDL or Verilog, or SystemVerilog RTL languages for ASIC or FPGA design
Experience with ASIC or FPGA hardware design and implementation using RTL tool flows and methodologies
Knowledge of Windows and Linux OS
Self-motivated, flexible, self-disciplined, and comfortable in a dynamic, quick-moving environment.
Strong interpersonal and communications skills with the ability to quickly establish rapport and credibility with our customers, sales, and product teams.
Strong oral, written communication, and presentation skills
Excellent organizational and time management skills

Preferred qualifications:

MS Electronic/Computer Engineering
Knowledge of UVM and System Verilog for Verification
Knowledge of C/C++ programming languages
Demonstrated proficiency with Object-Oriented Programming experience in test bench architecture and design
Knowledge of scripting languages (e.g. Shell, tcl, Perl, Python)

At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow’s reality. Find out more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds

Siemens Industry Software Inc. is a technology supplier to the United States Federal Government. Recently The White House issued an Executive Order requiring most federal workers, contractors, and subcontractors who do business with the government to get vaccinated against COVID-19 unless granted an accommodation due to a disability or sincerely held religious belief or practice. The Company has decided to pause enforcement of the vaccine mandate for the time being while the issue is addressed by the courts. We will be monitoring the situation closely and may lift the pause if required to do so in order to be in compliance with federal law. If this pause is lifted, you will be expected to be vaccinated against COVID-19.

Where permitted by applicable law, Siemens may require employees to be fully vaccinated against COVID-19 based on job requirements, and in accordance with accommodation based on legally protected reasons.

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Organization: Digital Industries

Company: Siemens Industry Software Inc.

Experience Level: Experienced Professional

Job Type: Full-time

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Corporate Application Engineer (UVM, System Verilog, VHDL) - Multiple Locations.

Job Description

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