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Member of Technical Staff

ジョブID
516047
公開開始日
30-7月-2026
組織
Digital Industries
職種分野
Research & Development
会社
SIEMENS EDA (INDIA) PRIVATE LIMITED
経験レベル
初級プロフェッショナル
ジョブタイプ
フルタイム
勤務形態
オフィス/サイトのみ
雇用形態
無期雇用
ロケーション
  • ノイダ - ウッタル・プラデーシュ州 - インド
Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.

Position Overview

Be an integral part of a team that is developing comprehensive verification IP solutions for leading interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5, and coherency protocols like CXL for use with Questa RTL simulation. You'll work on cutting-edge technologies where your expertise in SystemVerilog, UVM, assertions, and coverage drives innovation. With the freedom to think in new categories and collaborate with colleagues globally, you'll specify, implement, test, and enhance verification components that help design teams find more bugs in less time than conventional simulation techniques.

Key Responsibilities

• Specify, implement, test, and enhance verification IP components for a wide range of end-user applications and standard bus protocols

• Design and develop SystemVerilog testbenches and verification methodologies (UVM, VMM) to validate complex semiconductor interfaces and protocols

• Work on advanced verification technologies including assertions, coverage analysis, test planning, Bus Functional Model (BFM) design, debugging, and logging strategies

• Collaborate with Technical Marketing Engineers (TMEs), Field Application Engineers (AEs), and customers to deploy verification solutions and resolve technical issues

• Contribute to knowledge sharing and learning within a global team of verification specialists, building expertise in emerging protocols and design methodologies

Qualifications

• Bachelor's or Master's degree in Electronics Engineering or related discipline from a reputed institution

• Strong hands-on experience in verification engineering with proven expertise in SystemVerilog testbench development

• Demonstrated knowledge of verification methodologies such as UVM or VMM with exposure to industry-standard protocols (PCIe, USB, SATA, NVMe, DDR, DIMM, or similar)

• Solid understanding of simulation-based verification, assertions, and functional coverage analysis

• Excellent communication skills and the ability to work effectively in cross-functional, global teams

• Passion for learning new technologies and building expertise in emerging verification areas

Why We're Here

We are Siemens:

At Siemens Software, flexibility is how we work—hybrid by default, built on trust and autonomy. Together, 30,000 people across more than 200 countries build technology that shapes the real world.

You'll grow through real projects, strong technical peers, and global mobility, backed by the scale and benefits of an industrial software leader. We're committed to equality and inclusion, and we hire based on merit, skills, and impact. Bring your curiosity and creativity and help us shape tomorrow!

Our Commitment to Diversity

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.


Siemens Software. Transform the Everyday

#LI-Hybrid

#LI-EDA